FTXL 3190 Free Topology Transceiver Solution
Build powerful LonWorks devices using Altera Cyclone II/III FPGA technology.
If your project requires the utmost in performance and flexibility, you need the FTXL 3190 Free Topology Transceiver Solution. This solution comprises three pieces:
- The FTXL 3190 Free Topology Transceiver
(a transceiver and media access controller) - The Altera Cyclone II/III FPGA chip
(sold separately) - The FTXL Developer's Kit
Includes development tools, the LonTalk API, and an ANSI/CEA-709.1-B (EN14908.1) protocol stack.
The FTXL solution is perfect for creating high-performance controllers (with or without displays) for system-, area-, and zone-level applications. Applications and markets that benefit from the FTXL solution include:
- Building Automation
- Industrial Markets
- Lighting Control
- High-End Window Blind Control
- Safety Lighting Control
High Performance and Flexibility
We've ported our widely used LonTalk protocol stack to the Nios II embedded processor, which is supported by the Altera Cyclone II/III FPGA device families. Cyclone II/III FPGA devices include a wide range of density, memory, embedded multiplier, and packaging options to suit your performance needs. They also support a wide range of common external memory interfaces and I/O protocols that are common in low-cost applications. More power, more choices. What more could you want?
Features
The FTXL solution includes a number of enhanced features:
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Solution Architecture
A typical FTXL device includes the following components:
- Altera Cyclone II/III FPGA device with a 32-bit Nios II embedded processor (available from Altera and Altera distributors)
- FTXL Nios II library
- FTXL 3190 Transceiver Chip (available from Echelon and Echelon distributors)
- FT-X1 or FT-X2 Communication Transformer (available from Echelon and Echelon distributors)
- LonTalk API and protocol stack (downloaded as part of the FTXL Developer's Kit)
A high-speed, 8-bit parallel interface between the Nios II host processor and the FTXL 3190 Transceiver supports an uplink interrupt as packets from the network are received and moved up the LonTalk protocol stack running on the Nios II host. The FTXL 3190 Transceiver implements layers 1 and 2 of the ANSI/CEA-709.1-B (EN14908.1) protocol to free the Nios II processor from media access processing.
The default buffer configuration on the FTXL Transceiver chip supports the maximum ANSI/CEA-709.1-B (EN14908.1) packet size of 255 bytes. The device driver uses the Altera Hardware Abstraction Layer (HAL) to implement a portable interface that can be easily incorporated into your design, even if your final FPGA hardware solution does not match that of the development board.
Get Started Today
The FTXL Developer's Kit includes everything you need to create an application based on the FTXL solution. Learn more.